Linear Monostable Converts Capacitive Transducer Measurements into Pulse Train

What you'll learn:

How to build a circuit that converts capacitance into a pulse train.
Test results of the circuit design.

The circuit in图1您可以使用恒定电流源和由两个Nand-Gate芯片（74HC132）形成的线性单稳态将电容转换为脉冲序列。该电路还提供了两种脉冲来控制外部计数器功能，例如闩锁和重置，在驾驶显示器时，数字计数器和闩锁通常要求它们。当需要将换能器的电容测量（例如相对湿度）转换为脉冲序列时，该单个可单位的应用包括仪器电路。

C_X代表电容传感器(Fig. 1, again)。该电路由N.O.触发。PushButton，它具有由R的辩论网络_p和C1创建一个干净的瞬态低脉冲。图2shows the actual assembled circuit on a printed circuit board (PCB). A 0.1-µF bypass capacitor is placed between voltage and ground.

在其初始状态下，U1B较高，以饱和度驱动晶体管Q2，它使电容器C保持C2_X接地（图3）。这会禁用由U2B形成的门控振荡器。

When the pushbutton is pressed, the SR latch makes U2A go high while U21 goes low（图4）。这使晶体管Q2截止了，允许C_X用恒定电流线性充电。

恒定电流源由Q1，PNP晶体管及其相关组件形成。这个常量的电流i_k由等式1：

i _k =（V _cc - V _b - V _BE）/r _e（1）

其中v_CC= 5.1 V, V_b= 4.1 V和V_是= 0.7 V.要获得正时常数t，我们代替电流我_k在变量r中如下等式2：

 t = r c _x =（V _cc c _x）/i _k（2）（2）p>

然后将方程式2乘以比率（v_t+/v_CC), which is defined by the positive threshold voltage in NAND gate U1C and V_CC。该比例代表电容器C的最大电压_Xwill reach. By substituting I_kin Equation 2, we get a linear timing and charging ramp（图5）具有各自的等式3：

 t = [（v _cc）c _x×（v _cmax/v _cc）×r_e]/（V _dd  -  V _B  -  V _BE）（3）

Then we substitute our component values and voltage measurements to get Equation 4:

 t = [（5.12 V）（2200 µF）（3.28 V/5.12 V）（220Ω）]/（5.12 V  -  4.08 V  -  0.636 V）（4）（4）

电容器c_X=放置2200 µF，例如，我们获得等于3.9秒的时间段。该结果的准确性取决于公式4中包含的所有组件的公差。

The constant current I_k停止充电电容器C_Xwhen its voltage reaches the positive threshold voltage V_t+, in this case 3.28 V. At this point, NAND gate output U1C goes to a logic low, disabling the oscillator, and generates two transient pulses in sequence with the half-monostables formed by NAND gates U1D and U2A.

U1D形成的边缘检测器在下降边缘触发(Fig. 6)来自来自NAND GATE U1A的输出脉冲。

NAND GATE U1A产生的正瞬态脉冲称为闩锁(Fig. 7)，及其周期₂is given by Equation 5:

< p > T <子> 2子> < / = R <子> 3 < /子> C <子> 2 < /子> Ln (V _CC/(V_CC – V_t+)] (5)

When this pulse ends, it triggers the second half-monostable formed by R4 and C3, producing a positive transient Reset pulse T3（图7，再次）由等式6定义。

T₃ = R₄C₃Ln[V_CC/(V_CC – V_t+)] (6)

The gated logic oscillator formed by NAND-gate U2B and its associated components delivers a pulse train(Fig. 8)按公式定义的频率7：

 f = {1/r ₅ c ₄ ln [（V _t+/v _t t   -）×（v _cc  -  v _t  - ）/（v _cc  -  v _t+）]}（7）

This oscillator doesn’t have a startup delay because the 500k trimpot in series with R6 must be calibrated a few millivolts below the positive threshold voltage V_t+(see the reference below)。Notice that when this oscillator is disabled, capacitor C5 requires a time delay to again reach the fixed voltage set by the trimpot. This time delay may vary depending on the capacitor’s voltage before it was disabled. If the capacitor’s voltage was equal to V_t_-禁用时，将需要公式8定义的恢复时间：

 t2 = r ₅ c ₄ ln [（v _cc  -  v _t t   - ）/（v_cc  -  V _t+）]（8）

This delay sets the time you must wait to apply the next pulse on the pushbutton. The oscillator frequency is set with a fixed capacitor C4 and resistor R5according to the counter resolution and desired precision reading. You can add a series potentiometer to R5 to adjust such a frequency.

This circuit can be made to retrigger by itself. A feedback loop would be placed from the Reset Pulse to the pushbutton input, using another edge detector triggered at the falling edge. This would require the edge detector to provide a Low pulse on the trigger input with a minimum period equal to 1 µs. R_p不需要。请记住，当自身触发时，外部计数器将继续以公式3给出的速率连续更改其读数。否则，它将看起来像闪烁。

建议使用1％的公差金属膜电阻器，以使温度变化高达1％的变化。关于电容器，您必须使用聚酯或聚苯乙烯类型在温度方面具有最小值变化。另外，R5的Trimpot必须具有低温循环常数。