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High-speed serial interfaces are the primary I/O architecture of most of today’s communications products. Virtually all electronic devices in use now incorporate fast serial data transfers. Examples include ASIC and FPGA connections on a printed-circuit board (PCB), board-to-board connections, or short cables. Multiple interface standards exist to carry such data.
PCIe is used in computers, SATA and SAS generally target storage products, and Ethernet is employed in networking. Other serial standards are used in telecom, medical, and consumer products. And gigabit data speeds are the norm. With serial rates up to 28 Gb/s and more, the design challenge is maintaining signal integrity over any distance. Careful design of the signal path and the inclusion of equalization have proven to produce the desired result.
信号完整性的目标
任何串行链接的主要设计目标是低位错误率（BER），最小抖动和无符号间干扰（ISI）。典型的啤酒在10中-10到10-18range. Jitter is the rapid time shift in the leading and trailing edges of a pulse. It’s similar to a low-deviation frequency modulation caused by clock instability, PLL variations, and noise. Jitter is measured by averaging bit interval variations, usually in picoseconds. ISI is the condition where adjacent bits in the serial pulse train lap over and interfere with one another due to signal distortion, causing bit-interpretation errors.
这些设计目标是通过精心设计的信号路径实现的。其中包括物理路径以及添加到路径中的任何校正电路。纠正循环包括均衡器，中继器和网状器。
良好的信号完整性是t的一个常见的测量he eye diagram, which is an oscilloscope display of repeating and overlapping bit time periods (unit intervals or UIs)(Fig. 1)。上升和秋季时间定义了模式。
With fast rise and fall times, the “eye” becomes wide open, meaning signal transitions are clear. Propagation over the signal path introduces attenuation and distortion that reduces signal amplitude and rounds the rise and fall times, closing the “eye.” The smaller more closed eye is more difficult to detect at the receiver, thereby increasing BER. Any noise also varies the eye, making detection of the bit problematic.
The Signal Path
典型的信号路径是差分对传输线。传输线作为条纹线实现，在打印电路板（PCB）上或电缆中的铜线上的一对平行铜迹线。信号路径还包括与PCB上IC的连接和通过连接器。在大多数设备中，总信号路径长度从几英寸到几英尺不等。
The goal is to maintain a constant characteristic impedance throughout the path. Recall that the characteristic impedance of a transmission line is set by its physical dimensions that determine the resistance, capacitance, and inductance per unit length. The line must be terminated in its characteristic impedance. Any load mismatch or variation in impedance caused by anomalies in the path causes reflections. Some of the signal is sent back to the transmitter, thereby distorting the signal and reducing the output-signal amplitude.
Here are a few guidelines forlaying out a differential transmission line在PCB上：
• Line width and spacing must remain constant over the entire path. Any variation, even minor deviations, will cause an impedance change and reflection.
•对于路径的全长，必须有一个恒定的对称参考平面。
• All connections to IC pins or connectors must be fully symmetrical and of the same width and length.
•为了获得最佳性能，传输线应分布三倍或更多倍的线宽度与其他组件或线条。
• Keep in mind that different sizes and spacings of IC and connector pins and vias will introduce impedance mismatches.
输电线路路径本质上作为一种low-pass filter for the serial data signal. In turn, rise and fall times increase, signal rounding and distortion occur, and signal amplitude is greatly attenuated. These effects intensify with data rate. The loss increases linearly with the length of the transmission line. Skin-effect loss raises path resistance at a rate proportional to the square root of frequency.
At frequencies beyond several hundred megahertz, dielectric losses in the PCB material or cable insulation dominate attenuation. Signal attenuation or insertion loss can be as high as 30 dB or more in some longer paths. Such attenuation and distortion increase BER. As an example,Fig. 2shows the insertion-loss frequency-response curve for a two-foot-long stripline transmission line on an FR4 PCB. At 12 GHz, the loss is a staggering 42 dB.
校正信号降解
To compensate for signal impairment, one can apply a technique called equalization. Equalization is the process of correcting for the frequency response of the data path. Equalizers are essentially filters that reverse the effects of the transmission channel, meaning that they flatten the frequency response of the path.
Equalization is used at either the transmitter (TX) or the receiver (RX), or both.Fig. 3shows a signal path that includes both. The TX equalizer, called a feedforward equalizer (FFE), is essentially a high-pass filter that pre-distorts the signal in a way to overcome the degradation of the channel. It boosts the signal level at the rise and fall transitions to compensate for the rounding and signal stretching. While transmitter equalization can be accomplished with an analog filter, most equalization these days is of the digital variety.
沿传输线的差分数据路径会吸收噪声，但是由于差分对的共同模式拒绝属性，因此大部分被取消。在接收器上，连续时间线性均衡器（CTLE）和决策反馈均衡器（DFE）进一步补偿了时钟和数据恢复之前的传输路径疾病（CDR）。
TX均衡器的一个示例是馈电平均化（FFE）电路，该电路通常以有限的突击反应（FIR）过滤器实现（图4）。The delays are one bit time or one UI. The values of the coefficients (cursors) determine the degree of preemphasis. These coefficients are initial estimates, as the actual degree of distortion in the signal path is not known. However, if the coefficients can be readjusted later on, it’s possible to optimize the preemphasis when the channel characteristics are known.太少或太多的均衡会增加ISI和BER。
图4中的系数值称为光标。主要的光标是稍微中心的电压。前载体是位于主要位之前发生的钻头中心的电压。弯曲后的电压是钻头后钻头中心的电压。输出是在关注点之前发生的钻头电压的产物之和。这种校正形式涉及强调电压过渡并取消非转换。
图5shows the result of equalization on a bit stream. Fig. 5a shows the original unequalized signal; note that each bit voltage is numbered. Fig. 5b is the equalized signal, which is equivalent to a high-pass response that offsets the low-pass response of the data path.
在接收器（RX）上也使用均衡化。RX均衡的两种最常见的类型是连续时间线性均衡（CTLE）和决策反馈均衡（DFE）。可以在接收器上使用FFE FIR过滤器；通道响应使得可以预测系数，从而实现自适应均衡。一个更常见的安排是使用CTLE和DFE。
The CTLE is usually a high-gain active RC filter that produces more gain at the higher frequencies to offset the losses in the channel. The DFE uses a FIR like the FFE(Fig. 4, again)in a feedback path as illustrated inFig. 6。The feedback is the previously detected signal, and it’s subtracted from the incoming signal in an effort to cancel any ISI.
许多结合高速串行接口的设备都包含某种均衡形式。但是，设计也可以根据需要在外部添加。当前可用的IC的典型特征是Texas Instruments的DS280BR810和DS250DF810。DS280BR810是一种低功率，28-GB/s，八通道中继器，包括线性均衡形式。它是用于延长ASIC或FPGA的覆盖面的理想选择。DS250BR810是25 GB/s，八通道网状电网，用于扩展背板和光纤设备上的信号范围。接收器包括主动ctle和自适应DFE；发射器包括一个FIR滤波器。还有各种各样的其他设备。
绿色盒子测试
The key to optimum signal integrity and minimal BER is proper setting of the transmitter FIR coefficients. The TX doesn’t know the characteristics of the channel, so the settings will initially not be the best possible. These settings are an issue in any product using multi-gigabit serial links such as routers, switches, and security equipment.
The approach taken byGreen Box (GB) testingis to sweep the coefficients over a range and make measurements to establish a pattern that will indicate when the channel is optimized. The outcome is a graphical plot of BER for each pair of TX coefficient settings. The outputs with no errors are colored green. Readings with errors but less than the RX can record are colored yellow, while maximum errors are recorded as red.Fig. 7shows a typical GB plot.
The basic test procedure is to connect the transmitter to a pseudorandom-binary-sequence (PRBS) generator set to a bit pattern typical of what’s mandated by the interface protocol. Set some initial values for the FIR coefficients—these are the pre-cursor and post-cursor values. Next, transmit the data. Allow several seconds for the RX equalizer to adapt. Then measure the BER at the receiver. Compare the measured BER to a target BER for the system. Plot the result. The optimum set of coefficients is usually in the center of the green region.
Green Box testing is often the fastest and most reliable way to pinpoint the transmitter settings that enable the system to meet the design requirements.
