您将学到什么：
- 什么是USB4？
- 使用车道适配器状态机来描述逻辑链路层的行为。
- 逐步调试和优化USB链接的逐步过程。
USB Type-C连接器已通过USB，DP和Thunderbolt等普遍存在的标准获得了大量采用。USB4是USB的最新变体，将在80gb/s的链接下并行在类型C连接器的所有四个车道上传输和接收，键合率为40 GB/s。
在USB 3.2, the link optimization is performed directly on the high-speed TX/RX lanes; the SBU (sideband use) lines aren’t utilized. In USB4, the link training is set up via the SBTX and SBRX wires. This article will prepare you to debug and optimize a USB4 logical layer link.
Before a USB4 link can even start, there are many steps that precede it. VBUS must be present, and the USB-PD protocol must agree that the link partners and the cable can run at the USB4 rate.
USB4物理数据速率在一个车道上为20 GB/s，需要在X2模式下以40 Gb/s的键合有效比特率运行。许多其他高速标准的运行速度要快得多。USB4面临的挑战是，该链接需要使用20 GB/S X4管道或80 GB/s的低成本电缆运行。
将所有这些放在一起
现在，我们了解所需的各种信号，我们必须找出访问，捕获和分析信号所需的不同解决方案。
图1provides an overview of the different components:
- N7019A可访问所有类型C信号：USB-PD，SBTX/SBRX和高速TX/RX线路的VBU，CC。
- MXR系列示波器具有实时协议触发器，可在SBTX/SBRX线上捕获感兴趣的事件。
- UXR系列示波器捕获高速20-GB/S信号传导并执行协议分析。
Stepping Through the Logical Link Layer
车道适配器状态机器（图2）描述链接序列期间逻辑层的行为。这是通过这些状态和子州的每个州的分步：
- 进入链接时CLd伙伴initially connected.
- 从CLD到训练子州的过渡。
- 训练.lock1子州进行TXFFE谈判。
- Lane Bonding transition from two Single-Lane Links into a Dual-Lane Link.
- 断开状态。
Entry to CLd State
当正在测试的USB4设备（DUT）上电动时，它将进入CLD状态。
通过解码侧带通道SBTX/sbrx“读取链接config at”数据包，您可以读取DUT在CLD状态（图3a）。在this state, the high-speed Tx and RX lanes are inactive（图3b）。
Transition from CLd State to Training.LOCK1 Sub-State (Primary Lane)
离开CLD状态后，车道适配器应过渡到训练。lock1子状态。在这种状态下，符号被同步，车道参数在车道的末端之间传递。高速TX和RX车道在此状态下处于活动状态。可以通过在“ lt_resume（主车道）”数据包上触发SBTX/SBRX线路通道上标识这一点(Fig. 4a)。
在高速TX/RX车道上，您现在将看到背对背符号锁定订购/slos1（图4b）。SLOS1是一种PRBS11模式，具有大量过渡，以促进位锁定。
从CLD状态到训练的过渡。Lock1子状态（次级/下级车道）
Although Single Lane operation is an allowed fall-back position, USB4 DUTs are required to be run and tested in x2 mode. As a result, training and optimization of the secondary lane is required as well.
在Figure 5a，，，，the trigger occurs on LT_Resume of Subordinate Lane. Notice that inFigure 5b，车道公共模式电压无法保持。
Training.Lock1 TxFFE Negotiation State
Training.Lock1 state is also where the critical TxFFE settings are negotiated. This state continues until RxLocked(L0) and Rxlocked(L1) is complete.
要捕获这个关键事件，我们需要在RX Active数据包上触发（图6a）。During this state, the USB4 high-speed lanes will be sending the high transition density SLOS1（图6b）。
TXFFE谈判的完成
在此状态下，Rx锁定（L0）和Rx锁定（L1）设置为1B（完成）在TXFFE寄存器的RX状态单词中，RXREQEST位设置为0B（图7a）。在addition, the Transport Layer will ensure the high-speed lanes have a continuous stream of Idle Packets（图7b）。
车道粘结（两个单车道链接到双车道链路）
To ensure both lanes have proper skew, the de-skew Ordered Set shall be the first bytes sent after the TS2 Ordered Sets. TS2 Ordered Sets shall be transmitted on an Adapter in CL0 state until the de-skew Ordered Set is sent.
在两条车道上完成TXFFE后，RX锁定（L1）设置为“完成”(Fig. 8a)。在图8b，您可以在高速车道上看到从TS2有序集的过渡到De-Skew Ordered Sets。
断开/系统睡眠状态
When a link partner is disconnected, it’s important to ensure the DUT goes into the System Sleep State by sending the LT_LRoff Transaction(Fig. 9)。The high-speed lanes are also inactive in this state.
Summary
The USB4 Link is very complex due to the 20-Gb/s signaling rate, crosstalk from three other lanes also running at 20 Gb/s, the need to bond for an aggregate 40 Gb/s, and the need to be optimized over a lossy passive cable.
This article demonstrated the tools to debug and optimize your USB4 Logical Link by connecting to the DUT, triggering on the correct low-speed packet, capturing both the side-band and high-speed signals, decoding the signals, and viewing the time-correlated Analog waveforms to determine potential signal integrity issues in the link.
